A field effect transistor with a vertical channel is a new solution for obtaining a small-sized field effect transistor (MOSFET). A channel length of the field effect transistor with a vertical channel is not defined directly by a photolithography process, but by an etching process for silicon platform, an ion implantation process or an epitaxy process. Therefore, a short-channel device can be easily fabricated without the complicated photolithography process. Further, the fabrication process is completely compatible with technologies for a planar MOSFET. A device with a vertical channel is considered by academia and industry to be one of the most promising novel devices for replacing the planar MOSFET. Now, they have been applied into areas such as ROM and DRAM.
According to the fabrication process, the field effect transistor with a vertical may be divided into two types. As for one type, the vertical channel is formed by an etching process for silicon platform and an ion implantation process. In the other type, the vertical channel is formed by an epitaxy process. An advantage of the former is that the process is relatively simple, yet a disadvantage of which is that the length of the channel is difficult to be controlled precisely. By contrast, the length of the channel can be controlled through the epitaxy process in the latter, however, the disadvantage lie in the complexity of the process and the strictness of equipments and process conditions. A MOSFET with a vertical structure in which a source is formed of polysilicon is disclosed in a Chinese patent No. 02129384.8. According to this patent, an area of an active region can be effectively reduced and the channel length can be controlled in a better way. Further, this device can be compatible with bipolar devices, which laid a foundation for obtaining a BiCMOS. As an increase of the integrated degree and a shrink of the device size, a short channel effect in a conventional silicon platform structure is getting more obvious, which has a serious impact on device performance. Thus, it is necessary to propose a device structure, which is capable of suppressing the short channel effect of a device with a vertical silicon platform, and a fabrication method thereof.